Introduction
One of the biggest problems in computer systems is that input/output devices operate much slower and more unpredictably than the CPU. If the CPU continuously waited for devices to finish their operations, system performance would collapse.
For example:
A keyboard may take milliseconds to generate input
A disk operation may take several milliseconds
A network packet may arrive unexpectedly
Meanwhile, the CPU can execute millions or billions of instructions during that time.
The operating system needs a mechanism that allows the CPU to continue useful work while devices operate independently. This mechanism is called interrupt handling.
Interrupts are one of the most fundamental concepts in operating systems because they enable:
Efficient multitasking
Asynchronous device communication
Responsive systems
Real-time event handling
Without interrupts, modern operating systems would be extremely inefficient.
What is an Interrupt?
An interrupt is a signal sent to the CPU that temporarily stops the current execution flow so the processor can respond to an important event.
The interrupt may originate from:
Hardware device
Software instruction
Timer
Exception condition
Core Idea
Device needs attention → CPU interrupted → handler executed
The CPU temporarily pauses current execution, handles the event, and then resumes previous execution.
Why Interrupts Are Necessary
Consider disk I/O without interrupts.
Polling Approach
CPU repeatedly checks:
while(device_not_ready);
Problems:
CPU wastes time
Poor utilization
Inefficient multitasking
Interrupt-Based Approach
Instead:
CPU starts device operation
CPU continues other work
Device sends interrupt when ready
CPU handles event only when needed
This dramatically improves efficiency.
Important Insight
Interrupts eliminate unnecessary waiting by allowing asynchronous communication
Types of Interrupts
Interrupts are classified based on source and behavior.
1. Hardware Interrupts
Generated by hardware devices.
Examples:
Keyboard input
Disk completion
Network packet arrival
These are asynchronous because they occur unpredictably.
2. Software Interrupts
Generated intentionally by software instructions.
Examples:
System calls
Trap instructions
Used to request operating system services.
3. Timer Interrupts
Generated periodically by system timer.
Used for:
Process scheduling
Time sharing
CPU preemption
4. Exceptions
Generated when CPU detects abnormal conditions.
Examples:
Divide by zero
Invalid instruction
Page fault
Interrupt Handling Sequence (Very Important)
Let’s analyze the actual internal sequence when an interrupt occurs.
Suppose a keyboard key is pressed.
Step 1: Device Generates Interrupt
Keyboard controller sends interrupt signal.
Step 2: CPU Finishes Current Instruction
CPU usually completes current instruction before responding.
Step 3: CPU Saves Context
CPU saves:
Program counter
Registers
Processor state
This is necessary because CPU must resume later.
Important Insight
Interrupt handling requires context preservation
Step 4: CPU Identifies Interrupt
CPU determines:
Which device generated interrupt
Which handler to execute
Step 5: Interrupt Service Routine (ISR) Executes
Special interrupt-handling code runs.
Tasks may include:
Reading device data
Clearing interrupt signal
Updating buffers
Step 6: Context Restored
CPU restores previous execution state.
Step 7: Interrupted Program Resumes
Program continues as if interruption never occurred.
Interrupt Service Routine (ISR)
The ISR is the function executed when an interrupt occurs.
Characteristics:
Short
Fast
High priority
ISRs should avoid:
Long computations
Blocking operations
Because interrupts may occur frequently.
Example ISR Tasks
Keyboard ISR:
Read pressed key
Store character in buffer
Disk ISR:
Mark I/O operation complete
Network ISR:
Receive packet
Interrupt Vector Table
The CPU needs to know:
Which ISR belongs to which interrupt
This mapping is stored in:
Interrupt Vector Table (IVT)
The table contains:
Interrupt number
Address of ISR
Example
Interrupt 1 → Keyboard ISR
Interrupt 2 → Disk ISR
Interrupt 3 → Timer ISR
Interrupt Priorities
Not all interrupts are equally important.
Example:
Power failure interrupt more important than keyboard interrupt
The OS assigns priorities.
High-Priority Interrupts
Handled first.
Low-Priority Interrupts
May wait temporarily.
Important Insight
Interrupt priorities prevent critical events from being delayed
Nested Interrupts
Sometimes an interrupt occurs while another ISR is executing.
This is called:
Nested interrupt
Example
Disk ISR running →
Power interrupt arrives →
Power ISR preempts disk ISR
Nested interrupts improve responsiveness but increase complexity.
Maskable vs Non-Maskable Interrupts
Maskable Interrupts
Can be temporarily disabled.
Used for:
Regular devices
Non-Maskable Interrupts (NMI)
Cannot be ignored.
Used for:
Critical hardware failures
Emergency conditions
Interrupt Latency
Interrupt latency is the time between:
Interrupt generation
ISR execution start
Lower latency is important for:
Real-time systems
High-speed devices
Sources of Latency
CPU busy
Interrupt masking
Context switching overhead
Context Switching During Interrupts
Interrupts often trigger context switches.
Example:
I/O completion wakes waiting process
Scheduler may switch processes
This connects interrupts directly to:
CPU scheduling
Process management
Interrupt-Driven I/O
Modern systems heavily rely on interrupt-driven communication.
Advantages:
Better CPU utilization
Efficient multitasking
Reduced polling overhead
Without interrupts:
CPU would spend huge time waiting
Polling vs Interrupts
| Feature | Polling | Interrupts |
|---|---|---|
| CPU Utilization | Poor | Better |
| Complexity | Simple | Higher |
| Responsiveness | Lower | Higher |
| Efficiency | Low | High |
Real-World Example
Suppose you press a key while watching a video.
Internally:
Keyboard generates interrupt
CPU pauses current process briefly
ISR reads key
Character stored in buffer
Video playback resumes immediately
This happens so fast that the user notices no delay.
Why Interrupts Are Powerful
Interrupts enable:
Multitasking
Device concurrency
Event-driven computing
Efficient hardware utilization
Modern operating systems fundamentally depend on interrupts.